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fix(ch390): deepen reset recovery

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2026-05-15 00:06:42 +08:00
parent 9ce1eed850
commit e1f4767e9a
5 changed files with 91 additions and 29 deletions
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Drivers/CH390/CH390.h
+12
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@@ -109,6 +109,7 @@ enum ch390_phy_mode
#define CH390_MAR 0x16
#define CH390_GPCR 0x1E
#define CH390_GPR 0x1F
#define GPR_PHYPD (1<<0) // PHY power down
#define CH390_TRPAL 0x22
#define CH390_TRPAH 0x23
#define CH390_RWPAL 0x24
@@ -145,11 +146,14 @@ enum ch390_phy_mode
#define INCR_POL_H 0x00
#define CH390_ALNCR 0x4A
#define CH390_SCCR 0x50
#define SCCR_DIS_CLK (1<<0) // Stop internal clock
#define CH390_RSCCR 0x51
#define CH390_RLENCR 0x52
#define CH390_BCASTCR 0x53
#define CH390_INTCKCR 0x54
#define CH390_MPTRCR 0x55
#define MPTRCR_RST_TX (1<<1) // Reset TX memory pointer
#define MPTRCR_RST_RX (1<<0) // Reset RX memory pointer
#define CH390_MLEDCR 0x57
#define CH390_MRCMDX 0x70
#define CH390_MRCMDX1 0x71
@@ -263,6 +267,7 @@ enum ch390_phy_mode
#define CH390_MAR 0x16
#define CH390_GPCR 0x1E
#define CH390_GPR 0x1F
#define GPR_PHYPD (1<<0) // PHY power down
#define CH390_TRPAL 0x22
#define CH390_TRPAH 0x23
#define CH390_RWPAL 0x24
@@ -298,10 +303,13 @@ enum ch390_phy_mode
#define INCR_POL_L 0x01
#define INCR_POL_H 0x00
#define CH390_SCCR 0x50
#define SCCR_DIS_CLK (1<<0) // Stop internal clock
#define CH390_RSCCR 0x51
#define CH390_RLENCR 0x52
#define CH390_BCASTCR 0x53
#define CH390_MPTRCR 0x55
#define MPTRCR_RST_TX (1<<1) // Reset TX memory pointer
#define MPTRCR_RST_RX (1<<0) // Reset RX memory pointer
#define CH390_MRCMDX 0xF0
#define CH390_MRCMDX1 0xF1
#define CH390_MRCMD 0xF2
@@ -424,6 +432,10 @@ void ch390_write_eeprom(uint8_t reg, uint16_t value);
*/
void ch390_software_reset(void);
void ch390_reset_memory_pointers(void);
void ch390_phy_power_cycle(void);
/**
* @name ch390_default_config
* @brief Config CH390 with default options: