luckfox-eng29
8f34c2760d
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
74 lines
2.0 KiB
C
74 lines
2.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* x86 TSC related functions
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*/
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#ifndef _ASM_X86_TSC_H
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#define _ASM_X86_TSC_H
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#include <asm/processor.h>
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#include <asm/cpufeature.h>
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/*
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* Standard way to access the cycle counter.
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*/
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typedef unsigned long long cycles_t;
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extern unsigned int cpu_khz;
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extern unsigned int tsc_khz;
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extern void disable_TSC(void);
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static inline cycles_t get_cycles(void)
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{
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if (!IS_ENABLED(CONFIG_X86_TSC) &&
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!cpu_feature_enabled(X86_FEATURE_TSC))
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return 0;
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return rdtsc();
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}
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#define get_cycles get_cycles
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extern struct system_counterval_t convert_art_to_tsc(u64 art);
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extern struct system_counterval_t convert_art_ns_to_tsc(u64 art_ns);
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extern void tsc_early_init(void);
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extern void tsc_init(void);
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extern unsigned long calibrate_delay_is_known(void);
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extern void mark_tsc_unstable(char *reason);
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extern int unsynchronized_tsc(void);
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extern int check_tsc_unstable(void);
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extern void mark_tsc_async_resets(char *reason);
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extern unsigned long native_calibrate_cpu_early(void);
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extern unsigned long native_calibrate_tsc(void);
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extern unsigned long long native_sched_clock_from_tsc(u64 tsc);
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extern int tsc_clocksource_reliable;
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#ifdef CONFIG_X86_TSC
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extern bool tsc_async_resets;
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#else
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# define tsc_async_resets false
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#endif
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/*
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* Boot-time check whether the TSCs are synchronized across
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* all CPUs/cores:
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*/
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#ifdef CONFIG_X86_TSC
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extern bool tsc_store_and_check_tsc_adjust(bool bootcpu);
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extern void tsc_verify_tsc_adjust(bool resume);
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extern void check_tsc_sync_source(int cpu);
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extern void check_tsc_sync_target(void);
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#else
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static inline bool tsc_store_and_check_tsc_adjust(bool bootcpu) { return false; }
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static inline void tsc_verify_tsc_adjust(bool resume) { }
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static inline void check_tsc_sync_source(int cpu) { }
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static inline void check_tsc_sync_target(void) { }
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#endif
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extern int notsc_setup(char *);
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extern void tsc_save_sched_clock_state(void);
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extern void tsc_restore_sched_clock_state(void);
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unsigned long cpu_khz_from_msr(void);
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#endif /* _ASM_X86_TSC_H */
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