Pullrequest fix backlight (#291)

* project : Merge the board configurations of Luckfox Pico Mini A and Luckfox Pico Mini B;
	  Merge the board configurations of Luckfox Pico Pro and Luckfox pico Max

Signed-off-by: eng29 <eng29@luckfox.com>

* sysdrv/source/kernel/arch/arm/boot/dts : Merge the device tree configurations of Luckfox Pico Mini A and Luckfox Mini B;
					 Merge the device tree configurations of Luckfox Pico Pro and Luckfox Pico Max

Signed-off-by: eng29 <eng29@luckfox.com>

* sysdrv/source/uboot : uboot add support for automatically executing custom commands defined by Luckfox

Signed-off-by: eng29 <eng29@luckfox.com>

* sysdrv/source/kernel : The Luckfox Pico series dynamically loads the BLACKLIGHT_PWM driver, which hides display abnormalities that occur during the screen initialization process

Signed-off-by: eng29 <eng29@luckfox.com>

* project/cfg/BoardConfig_IPC : Update the BoardConfig file and overlay file of the Luckfox Pico model that supports RGB, so that the BLACKLIGHT_PWM driver will be automatically loaded

Signed-off-by: eng29 <eng29@luckfox.com>

* project/cfg/BoardConfig_IPC : Add rtl8723bs module support for Luckfox Pico Mini / Luckfox Pico Plus / Luckfox Pico WebBee / Luckfox Pico Pro Max

Signed-off-by: eng29 <eng29@luckfox.com>

* sysdrv/drv_ko/wifi/insmod_wifi.sh : Add support for identifying rtl8723bs

Signed-off-by: eng29 <eng29@luckfox.com>

* sysdrv/source/kernel/arch/arm/configs/luckfox_rv1106_linux_defconfig : Add usb_audio, ch343 and rtl8723bs support

Signed-off-by: eng29 <eng29@luckfox.com>

* sysdrv/tools/board/buildroot : Enable the pcre2 package by default on startup

Signed-off-by: eng29 <eng29@luckfox.com>

* project/app/rkipc/rkipc/common/network/network.c : Fix missing DNS issue when bringing up Wi-Fi interface

Signed-off-by: eng29 <eng29@luckfox.com>

* README.md : Update description
README_CN.md : Update description

Signed-off-by: eng29 <eng29@luckfox.com>

* project/cfg/BoardConfig_IPC/overlay/overlay-luckfox-config/usr/bin/luckfox-config : Disable UART2_M1 pinmux configuration

Signed-off-by: eng29 <eng29@luckfox.com>

* project/cfg/BoardConfig_IPC/overlay/overlay-luckfox-config/etc/init.d/S99luckfoxconfigload : Remove the function of pressing the boot button to switch the screen model

Signed-off-by: eng29 <eng29@luckfox.com>

* sysdrv/source/kernel/arch/arm/boot/dts : Standardize the writing format of the dst files

Signed-off-by: eng29 <eng29@luckfox.com>

---------

Signed-off-by: eng29 <eng29@luckfox.com>
This commit is contained in:
luckfox-eng29
2025-06-11 10:47:51 +08:00
committed by GitHub
parent d2da6f0f4f
commit e2b0ffa22e
45 changed files with 348 additions and 780 deletions
@@ -60,16 +60,16 @@
// DHT11
dht11_sensor {
compatible = "dht11";
pinctrl-names = "default";
pinctrl-0 = <&gpio1_pc7>;
compatible = "dht11";
pinctrl-names = "default";
pinctrl-0 = <&gpio1_pc7>;
dht11@1 {
gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>;
label = "dht11";
linux,default-trigger = "humidity";
};
};
dht11@1 {
gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>;
label = "dht11";
linux,default-trigger = "humidity";
};
};
};
@@ -145,8 +145,6 @@
&i2c4 {
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c4m2_xfer>;
sc3336: sc3336@30 {
compatible = "smartsens,sc3336";
@@ -272,22 +270,22 @@
#address-cells = <1>;
#size-cells = <0>;
spidev@0 {
compatible = "rockchip,spidev";
compatible = "rockchip,spidev";
spi-max-frequency = <50000000>;
reg = <0>;
};
fbtft@0{
compatible = "sitronix,st7789v";
reg = <0>;
spi-max-frequency = <20000000>;
fps = <30>;
buswidth = <8>;
debug = <0x7>;
led-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;//BL
dc-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>; //DC
reset-gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>; //RES
};
fbtft@0 {
compatible = "sitronix,st7789v";
reg = <0>;
spi-max-frequency = <20000000>;
fps = <30>;
buswidth = <8>;
debug = <0x7>;
led-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;//BL
dc-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;//DC
reset-gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>;//RES
};
};
// I2C
&i2c0 {
@@ -302,9 +300,11 @@
pinctrl-0 = <&i2c3m1_xfer &i2c3m0_xfer>;
};
// &i2c4 {
// pinctrl-0 = <&i2c4m0_xfer>;
// };
&i2c4 {
pinctrl-names = "default", "conifg";
pinctrl-0 = <&i2c4m2_xfer>;
pinctrl-1 = <&i2c4m0_xfer>;
};
// UART
&uart0 {
@@ -337,7 +337,7 @@
pinctrl-0 = <&pwm4m2_pins>;
};
&pwm5 {
pinctrl-0 = <&pwm5m2_pins>;
pinctrl-0 = <&pwm5m1_pins &pwm5m2_pins>;
};
&pwm6 {
pinctrl-0 = <&pwm6m1_pins &pwm6m2_pins>;
@@ -352,7 +352,7 @@
pinctrl-0 = <&pwm10m1_pins &pwm10m2_pins>;
};
&pwm11 {
pinctrl-0 = <&pwm11m1_pins>;
pinctrl-0 = <&pwm11m1_pins &pwm11m2_pins>;
};
&pinctrl {
@@ -371,10 +371,10 @@
};
};
gpio1-pc7 {
gpio1_pc7:gpio1-pc7 {
rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
};
gpio1-pc7 {
gpio1_pc7: gpio1-pc7 {
rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};